CXL
Linux Kernel 6.10 is Released: This is What's New for Compute Express Link (CXL)
The Linux Kernel 6.10 release brings several improvements and additions related to Compute Express Link (CXL) technology.
Read MoreLinux Kernel 6.9 is Released: This is What's New for Compute Express Link (CXL)
The Linux Kernel 6.9 release brings several improvements and additions related to Compute Express Link (CXL) technology.
Read MoreUsing Linux Kernel Tiering with Compute Express Link (CXL) Memory
In this blog post, we will walk through the process of enabling the Linux Kernel Transparent Page Placement (TPP) feature with CXL memory mapped as NUMA nodes using the system-ram namespace.
Read MoreUnderstanding Compute Express Link (CXL) and Its Alignment with the PCIe Specifications
How CXL Uses PCIe Electricals and Transport Layers CXL utilizes the PCIe infrastructure, starting with the PCIe 5.
Read MoreHow To Map a CXL Endpoint to a CPU Socket in Linux
When working with CXL Type 3 Memory Expander endpoints, it’s nice to know which CPU Socket owns the root complex for the endpoint.
Read MoreLinux NUMA Distances Explained
TL;DR: The memory latency distances between a node and itself is normalized to 10 (1.
Read MoreHow To Emulate CXL Devices using KVM and QEMU
What is CXL? Compute Express Link (CXL) is an open standard for high-speed central processing unit-to-device and CPU-to-memory connections, designed for high-performance data center computers.
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