CXL
![Linux Kernel 6.10 is Released: This is What's New for Compute Express Link (CXL)](/blog/2024/07/linux-kernel-6.10-is-released-this-is-whats-new-for-compute-express-link-cxl/featured_image_002_hu55e304202ca035160efd206b02f31ca9_157460_405x225_resize_q80_h2_lanczos_2.webp)
Linux Kernel 6.10 is Released: This is What's New for Compute Express Link (CXL)
The Linux Kernel 6.10 release brings several improvements and additions related to Compute Express Link (CXL) technology.
Read More![Linux Kernel 6.9 is Released: This is What's New for Compute Express Link (CXL)](/blog/2024/05/linux-kernel-6.9-is-released-this-is-whats-new-for-compute-express-link-cxl/featured_image_002_hu55e304202ca035160efd206b02f31ca9_157460_405x225_resize_q80_h2_lanczos_2.webp)
Linux Kernel 6.9 is Released: This is What's New for Compute Express Link (CXL)
The Linux Kernel 6.9 release brings several improvements and additions related to Compute Express Link (CXL) technology.
Read More![Linux Kernel CXL Feature Tracker](/projects/linux-kernel-cxl-tracker/featured_image_004_hubd66c0513f617008145ef3387a52d03e_202474_405x225_resize_q80_h2_lanczos_2.webp)
Linux Kernel CXL Feature Tracker
I’m always watching the Linux Kernel for new and exciting features that are merged for Compute Express Link (CXL).
Read More![Using Linux Kernel Tiering with Compute Express Link (CXL) Memory](/blog/2024/05/using-linux-kernel-tiering-with-compute-express-link-cxl-memory/linux_terminal_prompt_hu762c10cdd922e947329e02ebd83296ff_326603_405x225_resize_q80_h2_lanczos_3.webp)
Using Linux Kernel Tiering with Compute Express Link (CXL) Memory
In this blog post, we will walk through the process of enabling the Linux Kernel Transparent Page Placement (TPP) feature with CXL memory mapped as NUMA nodes using the system-ram namespace.
Read More![Understanding Compute Express Link (CXL) and Its Alignment with the PCIe Specifications](/blog/2024/05/understanding-compute-express-link-cxl-and-its-alignment-with-the-pcie-specifications/pcie-slots-on-motherboard_hu2ebff835d5f54fe5dd56a86ccc30d45f_168486_405x225_resize_q80_h2_lanczos.webp)
Understanding Compute Express Link (CXL) and Its Alignment with the PCIe Specifications
How CXL Uses PCIe Electricals and Transport Layers CXL utilizes the PCIe infrastructure, starting with the PCIe 5.
Read More![A Practical Guide to Identify Compute Express Link (CXL) Devices in Your Server](/blog/2023/05/a-practical-guide-to-identify-compute-express-link-cxl-devices-in-your-server/server_featured_image_900x600-min_hu36e3872f03327cb97447ede10be4131f_118730_405x225_resize_q80_h2_lanczos.webp)
A Practical Guide to Identify Compute Express Link (CXL) Devices in Your Server
In this article, we will provide four methods for identifying CXL devices in your server and how to determine which CPU socket and NUMA node each CXL device is connected.
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